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How to perform the SOC test with reduction the development cycle time and production cost without scarifying the performance is the challenge confronted by design engineer and test engineer.
如何在缩短设计周期、降低芯片成本而又不损失芯片性能的前提下
成SOC系统芯片的测试是芯片设计工程师和测试工程师当前所要面对的挑战。
生成，部分未经过人工审核，其表达内容亦不代表本软件的观点；若发现问题，欢迎向我们指正。
